Main Menu Test Selection
3.6.2.1 Unattended Tests
A single test or any combination of tests will be selected by typing the corresponding letter or letters, then typing the RETURN key. To run repeated cycles of a test or (tests), the last letter typed is followed with the number of cycles to run.
For example, "RSM25", will run RAM, Serial, and MIDI tests 25 times. If 0 is entered, testing will be continuous. The ESC key will quit a test cycle. In most cases control will be returned to the keyboard immediately.
An RS232 terminal may be used for input and display. Note, the Serial RS232 test will not pass if this terminal is installed in place of the loopback test plug.
If an error occurs, an error message will be displayed and the screen will turn red. When the test completes, Pass or Fail will be displayed, and the screen will turn green or red (red = dark background in monochrome).
If multiple tests are rim and an error occurs on any test, the screen will remain red, even if successive tests pass. Once the test has halted, the SPACE BAR is used to return to the menu.
The last selections in the unattended tests are canned group tests executed with a single letter and a C/R. If an individual or custom sequence is not required selecting one of the canned versions will automate the testing procedure.
The RAM and SRAM test starts by testing the 32K SRAM hooked up to the DSP. Several patterns are written and checked including all ones, all zeros, all AA, all 55, a random write pattern, and a walking ones patters. Next the system RAM is tested. System RAM is tested in three stages: low 2 kbytes, middle (up to 64k), and from 64k to top. The test patterns used are: all Is, all Os, a counting pattern (data = low word of the address), reverse counting pattern (data = complement of address low word). The counting pattern is copied from the top and bottom of a 32 Kbyte buffer into the current 32 Kbytes of video RAM, then shifts video RAM to a new area, verifies the pattern, and repeats the test, until the top of RAM is reached. Finally, addressing at 64k boundaries is checked by writing a unique pattern in the last 256 bytes of each 64k block. The DSP SRAM is also tested in this procedure.
If an error occurs, the screen will turn red accompanied by several beep tones. The error code is displayed, followed by the address, data written, data read, and the bits which did not agree. E.g.: " R2 45603E W:603E R:613C bad bits: 1,8".
RAM & SRAM Error Codes
RO Low memory failed while setting up to run test.
R1 Failed walking Is or Os.
R2 Failed address (counting pattern).
R3 Failed 64k boundary test. Probable failure in Memory Controller.
R4 Failed while displaying area tested (video RAM).
DSP4 SRAM Test Timeout; test started but never completed.
DSP5 SRAM Failure; RAM failure during SRAM test.
This test reads the configuration bytes of the operating system to determine the version, and language/country. All bytes from the operating system ROMs are then read and the checksums are calculated. These sums are then displayed. Finally, for each ROM a CRC is taken and compared with the word in the highest address location.
The test fails if the CRC calculated does not match the CRC found in the high address word. Incorrect CRC's are indicated by a message. If an error is displayed, replace the corresponding ROM.
NOTE: New revisions of TOS will not cause this test to fail since the calculated CRC is compared with a value found in the new TOS ROM's and is independent of a fixed lookup table.
This test sends data out the MIDI port, (data loops back through the cable) and reads from the input and verifies the data is correct. This also tests the interrupt from the 6850 through the MFP chip. The LED in the loopback cable will blink as data is sent (not all cables have the LED).
MIDI Error Codes
MO Data not received. Indicates a broken data path.
Ml Write/Read data mismatch. The data written was not the same as the data read.
M2 Input frame error. Noisy signal.
M3 Input parity error. Noisy signal.
M4 Input data overrun. The 6850 received a byte before the previous byte was read.
The MFP may not be responding to the interrupt request.
The SCC Serial Port diagnostic tests the SCC chip, serial port, and LAN port for several functions. Internal loopback polled (async), break (test ext loopback), external loopback polled (async), modem control lines, and external loopback interrupt (async).
SCC Serial Port Error Codes
Port A Errors:
SCC A internal loopback: Transmitter time-out SCC A internal loopback: Receiver time-out SCC A internal loopback: Overrun
SCC A internal loopback: Framing error SCC A internal loopback: Parity error SCC A internal loopback: Data compare Port A has no loopback connector
LAN has no loopback connector
LAN ERROR: DCD IS ACTIVE WITHOUT RTS ON
LAN ERROR: RTS IS ACTIVE BUT DCD IS
NOT RESPONDING
Port A async mode: Transmitter time-out
Port A async mode: Receiver time-out
Port A async mode: Overrun
Port A async mode: Framing error Port A async mode: Parity error Port A async mode: Data compare Port A modem control error: DTR-DCD Port A modem control error: DTR-DSR Port A modem control error: RTS-CTS
Transmitter failed. Receiver failed.
A byte was received before the CPU read the previous byte.
Incorrect time between start and stop bits. Input data had incorrect parity. Data read was not what was sent. The loopback connector is not installed on Port A.
The loopback connector is not installed on the LAN Port.
The Carrier detect signal is active without a request to send.
The request to send signal is on but no carrier is active. Transmitter failed. Receiver failed.
A byte was received before the CPU read the previous byte.
Incorrect time between start and stop bits. Input data had incorrect parity. Data read was not what was sent. Signal sent at DTR is not detected at DCD. Signal sent at DTR is not detected at DSR. Signal sent at RTS is not detected at CTS.
Port B Errors:
SCC B internal loopback: Transmitter time-out SCC B internal loopback: Receiver time-out SCC B internal loopback: Overrun
SCC B internal loopback: Framing error SCC B internal loopback: Parity error SCC B internal loopback: Data compare Port B has no loopback connector
LAN has no loopback connector
LAN ERROR: DCD IS ACTIVE WITHOUT RTS ON
LAN ERROR: RTS IS ACTIVE BUT DCD IS
NOT RESPONDING
Port B async mode: Transmitter time-out
Port B async mode: Receiver time-out
Port B async mode: Overrun
Port B async mode: Framing error Port B async mode: Parity error Port B async mode: Data compare Port B modem control error: DTR-DCD Port B modem control error: DTR-DSR Port B modem control error: RTS-CTS SCC Interrupt Errors: SCC interrupt error: Transmitter time-out SCC interrupt error: Receiver time-out SCC interrupt error: Overrun
SCC interrupt error: Framing error SCC interrupt error: Parity error SCC interrupt error: Data compare No Tx interrupt
No Rx interrupt
Transmitter failed. Receiver failed.
A byte was received before the CPU read the previous byte.
Incorrect time between start and stop bits. Input data had incorrect parity. Data read was not what was sent. The loopback connector is not installed on Port A.
The loopback connector is not installed on the LAN Port.
The Carrier detect signal is active without a request to send.
The request to send signal is on but no carrier is active. Transmitter failed. Receiver failed.
A byte was received before the CPU read the previous byte.
Incorrect time between start and stop bits. Input data had incorrect parity. Data read was not what was sent. Signal sent at DTR is not detected at DCD. Signal sent at DTR is not detected at DSR. Signal sent at RTS is not detected at CTS.
Transmitter failed. Receiver failed.
A byte was received before the CPU read the previous byte.
Incorrect time between start and stop bits. Input data had incorrect parity. Data read was not what was sent. A transmit command was issued but no interrupt occurred.
A receive command was issued but no interrupt occurred.
These tests are run at power-up as well as being selectable from the menu. The MFP timers, the timing for VSYNC and HSYNC, and the video display counters are tested. The video display test redirects display memory throughout RAM and verifies that the correct addresses are generated. Odd patterns may flash on screen as this test is run. There are two tests which check the bus timing for the AJAX and PSG chips. An error message is printed to the screen, then the test is run. If the test passes, the message is erased. If not, a Bus Error will occur and the message will remain. If a terminal is connected to the RS232 port, the message will not be erased, but "Pass" will be printed.
Timing Test Error Codes
TO MFP timer error. One or more of the four timers in the MFP did not generate an interrupt on counting down.
T1 Vertical Sync. VIDEL is not generating vertical sync in the required time period.
T2 Horizontal Sync. VIDEL is not generating horizontal sync in the required time period.
T3 Display Enable. VIDEL is not generating DE output or the MFP is not generating an interrupt.
T4 Video Counter Error. The COMBO IC is not generating the correct addresses for the display. This will result in a broken-up display m some or all display modes.
T5 PSG Bus Error. The PSG chip is defective.
T6 AJAX Bus Error. The AJAX chip is defective.
The SCSI port is tested by attaching a SCSI hard disk to the external connector. This disk must be set for unit 0, device 0 and nave it's terminating resisters installed. No asumption is made about the number of SCSI masters on the bus, so therefore all disk accesses will be done by arbitration. The SCSI interface is tested in DMA as well as CPU mode. Testing is done non-destructivly at block zero on the hard disk. Reads and writes are executed losing both the short and long commands. The test sequence is as follows:
1. Send the reset command
2. T 1 "J ~ ' e block from block zero on the hard disk into RAM using the read
3. Write the same 512 byte block back to block zero on the hard disk using the write short command.
4. Read the 512 byte block once more from block zero on the hard disk into a new memory location using the read short command.
5. Compare the two RAM buffers for data integrity.
6. Read one 32 Kbyte block from block zero on the hard disk into RAM using the read extended command.
7. Write the same 32 Kbyte block back to block zero on the hard disk using the write extended command.
8. Read the 32 Kbyte block once more from block zero on the hard disk into a new memory location using the read extended command.
9. Compare the two RAM buffers for data integrity.
10. Using the DMA controller read, write, and read again 64 Kbytes into two different RAM buffers (as above) using the SCSI extended commands.
11. Compare memory for data integrity and DMA over and under shoot outside the RAM buffers.
SCSI Error Messages
ERROR - SCSI STATUS CODE - XX SCSI controller has reported error number
ERROR - CANNOT SELECT SCSI DISK Cannot win arbitration for SCSI bus
ERROR PRG MODE - READ AND WRITE Data in the two RAM buffers are not the
BUFFERS DO NOT COMPARE same
ERROR DMA MODE - 5380 OR SCSI DISK IS An attempt to poll the SCSI drive faded NOT RESPONDING
ERROR DMA MODE - READ AND WRITE Data in the two RAM buffers are not the
BUFFERS DO NOT COMPARE same
ERROR-DMA BLOCK MOVE TIME OUT DMA block move operation timed out.
ERROR-TIME-OUT-SCSI BUS ALWAYS Interrupt not seen by MFP BUSY
In single test mode, a menu is displayed showing seven options:
If the disk is installed, formats, writes, and reads tracks 0, 1, and 79 of side 0. If double sided, formats and writes track 79 of side 1 and verifies that side 0 was not over written. If the disk is not installed, checks to see if the drive is on-line and if its double or single sided. To assure that the drive is correctly tested, the operator should install (menu option 6) before calling the test. Once the test is run, the drive becomes installed, and will be displayed on the menu screen (below the RAM size).
Continuously reads a track, for checking alignment with an analog alignment diskette. The track to t>e read may be input by the operator. If "Return" is pressed without entering a number, the default is track 40.
3.) Interchangeability test. Checks to see if a diskette formated on another drive can be read by the installed disk drive.
4.) Disk exerciser.
5.) Copy Protect Tracks.
7.) Install disk.
A more thorough disk test; tests all sectors on the disk for an indefinite period of time.
Tests tracks 80-82, which are vised by some software companies for copy protection). Not all manufacturers disk drives will write these tracks. NOTE: this test is for information only and should not be used to reject a mechanism.
The rotational speed of the drive is tested and displayed on the screen as the period of rotation. The acceptable range is 196-204 milliseconds. The highest and lowest values measured are displayed. The test stops when any key is pressed.
Specify what type of disk to test.
One additional test which can be performed is testing the write protect detection. Slide the write protect tab to the protected position, and run test #1. You should see "F5 Write protected" displayed if the drive has been installed, or "Unable to write disk" displayed if the drive has not been installed.
If more than one test cycle is selected from the main menu, the floppy menu will not appear, but the Quick Test will be selected automatically.
Floppy Test Error Codes
No floppy connected The controller cannot read index pulses. Indicates the cable may be improperly connected, or the drive has no power, or the drive is faulty.
FO Drive not selected. Drive was installed, but failed attempting restore (seek to track 0).
The general error messages "Error
Writing" (or reading or formatting), are combined with a more specific error message, e.g.,
"F9 CRC error".
F4 Seek error. Error occurred during a seek.
F5 Write protected. Indicates the floppy is write protected.
F6 Read compare error. Data read from the disk was not what was supposed to be written.
F7 DMA error. DMA Controller could not respond to a request for DMA.
F8 DMA count error. Amount of bytes transferred is not correct.
F9 CRC error. The floppy controller has flaged a CRC error.
FA Record not found. The floppy could not read a sector header.
FB Side select error-single sided drive. The test tried to write both sides of the diskette, but writing side 1 caused side 0 to be overwritten.
FC Lost data. Data was transferred to the AJAX chip faster than the AJAX could transfer to the DMA Controller.
FD Drive not ready. The format/write/read operation timed-
out.
The port test fixture is used to test the parallel printer port and joystick ports. The parallel port test writes to a latch on the test fixture ana reads back data. The joystick port test outputs data on the parallel port, which is directed through the test fixture to the joystick ports. The keyboard reads tne joystick data in response to commands from the CPU. The game controller port test simulates joystick direction input, fire button input, paddle controller input, and light gun inputs. The FALCON3Ô (STe) game port test fixture uses the joystick outputs and control lines from the port test fixture to generate the signals input to the FALCON3Q.
Printer/Joystick Error Codes
PO Printer port error. Data read from the printer port was not what was written.
PI Busy input error. The input to the MFP is not being read, or the STROBE output from the PSG is not functioning, or Joystick 0 pin 3 is not connected.
JO Joystick Port 0. The keyboard input is not functioning.
J1 Joystick Port 1. The keyboard input is not functioning.
J2 Joystick time-out. Joystick inputs were simulated by outputting data on the printer port and routing it via the test fixture to the joystick ports. Joystick inputs are detected by the keyboard and sent to the CPU via tne 6850. This error can be caused by printer port failure (code PO), keyboard failure, or keyboard-CPU communication line.
J3 Left button input. Not seen by the test board.
J4 Right button input. Not seen by the test board.
J5 Aux Joystick Direction. Game controller port (T500, J501) direction bits. U511 is used to drive the input via the test fixture. The nexadecimal data following corresponds to bits read from latches U510 and U512, where a one indicates an error. For example, 0002 indicates an error at J500 pin 3.
J6 Aux Fire Button. Fire buttons are read from U509. Signal is driven via the test fixture from the output of U511.
J7 Paddle. The inputs are driven by either 5V/100 ohms or 5V/ 1M on the test fixture. This current charges the RC network on the FALCON30, varying the output pulse of the LM556.
J8 Light gun. The light gun (XPEN) input is toggled at three points on the screen (the video address counter is used to find the position of the screen). The COMBEL should return the X/Y coordinates of the screen position.
The test saves the current time and date, and writes a new time, waits one second, and verifies that hours, minutes, seconds, etc. have all rolled over. This procedure is repeated for another date to verify all registers.
Real-Time Clock Error Codes
CO No Real-Time Clock
CI Increment Error
Two tests are available for this chip. The "Short BLiT Test" checks the ability of the BliTTER to move blocks of memory around and perform logical operations on the data. No patterns appear on the screen. If an error is detected, one of the error codes (G1-G12) is displayed.
In the "Long BLiT Test", a triangle is drawn on the screen and rotated 180 degrees until a rectangle is formed. If a color monitor is used, two identical images will be drawn. If an error occurs, the error code G14 will be displayed.
Corrective action for any error is the same:
a. Verify the jumpers for the BLiT/COMBEL chip are installed correctly.
b. Replace the chip (and if that does not cure the problem, replace the 68030).
Blitter Error Codes:
|
Gl |
Halftone RAM (Internal RAM in BLiT portion of COMBEL). |
|
G2 |
Endmask. |
|
G3 |
Operation. |
|
G4 |
Halftone Op. |
|
G5 |
Skew. |
|
G6 |
Reverse Bit. |
|
G7 |
Force Extra Source Read. |
|
G8 |
Smudge. |
|
G9 |
X Count. |
|
GA |
Y Count. |
|
GB |
Time-out. |
|
GC |
Address Count |
|
BUS ERROR during BliT |
Replace COMBEL chip. |
|
Test |
This test uses the FALCON30 expansion test fixture to verify all address, data, and control lines brought out to the expansion connector.
The test fixture has a minimum of 64k of static RAM and is jumper selectable for 128k. This RAM on power up is addressed at $FC0000 to $FDffff but is software selectable to be remapped to $FA0000 (cartridge ROM space). This means the board can be down loaded with the diagnostic code and then executed from the remapped static RAM for debug purposes. The test fixture can also be configured for installing the diagnostic cartridge EPROMs directly on to the board. Using the ATARI Debug program it will be possible to single step through the diagnostic code to either debug the code itself or for special test applications requiring detailed examination of the FALCON30 hardware as tne code is executed.
In the normal configuration the expansion test fixture has on board the following hardware:
1. Control Registers F70000-F70002
2. External blitter F78A00-F78A3F
3. 64k 120 nsec. static RAM FC0000-FCFFFF
The testing is done as follows:
1. A 64k on board RAM test will be executed to test address lines A0-A15 and all 32 data lines for shorts and opens.
2. The address lines (A16-A23) will be tested by reading from the upper 256 addresses and trapping one by one each address read in the address latch register.
3. The on board bhtter will, with little modification, execute the FALCON30 blitter tests. This exercises the bus master handshaking lines.
4. Single line tests include the following:
Priority interrupt, interrupts 1,3,5,and 6. Bus Error, halt, reset and 500 kHz.
Expansion Bus Errors
Spurious interrupt 5 Spurious interrupt 1 Spurious interrupt 6 Bus error from int level 6
Bus error Spurious Interrupt Address Error
Halt Test failed
500 KHZ clock stuck low 500 KHZ clock stuck high printer is not responding...
Bus error signal stuck low
Bus error signal stuck high
Blitter test failed
Expansion port is not connected
Address Latch failed at addr\exp\read: Interrupt level 1 failed
Interrupt level 3 failed
Interrupt level 5 failed
Interrupt level 6 failed
Interrupt priority failed
RAM failed addr.write, read:
A Spurious Interrupt was received on level 5. Check MFP, COMBO, and Interrupt line 5. A Spurious Interrupt was received on level 1. Check MFP, COMBO, and Interrupt line 1. A Spurious Interrupt was received on level 6. Check MFP, COMBO, and Interrupt line 6. A Bus Error was asserted while accessing Interrupt Level 6. Check MFP, COMBO, and Interrupt line 6.
A Bus Error occurred during testing. Check COMBO.
A Spurious Interrupt was received during testing. Check MFP, COMBO, and Interrupt lines. An Address Error occurred during testing. Check COMBO, MC68030, and all address lines for shorts or opens.
A halt operation failed to take place when programmed. Check COMBO, HALT line, and MC68030.
The 500 kHz line is stuck. Check COMBO and clock line.
The 500 kHz line is stuck. Check COMBO and clock line.
The printer port did not respond to command. Check printer data line, SDMA, COMBO, and PSG.
The Bus Error line is stuck. Check COMBO and Bus Error line.
The Bus Error line is stuck. Check COMBO and Bus Error line.
Expansion Blitter test failed. Check COMBO, address lines, and data lines. Expansion test fixture not installed. Check connection of Expansion Test Fixture. Address Latch Failed. Check COMBO. Interrupt failed on level 1. Check MFP, COMBO, and Interrupt line 1.
Interrupt failed on level 3. Check MFP, COMBO, and Interrupt line 3.
Interrupt failed on level 5. Check MFP, COMBO, and Interrupt line 5.
Interrupt faded on level 6. Check MFP, COMBO, and Interrupt line 6.
Interrupt priority test failed. Check MFP, COMBO, and Interrupt lines. RAM test failed. Check COMBO and RAM address and data lines.
This test loads a program into the DSP and then sends it's internal sine wave table out a loopback connector on the DSP port.
NOTE: The loopback connector cannot have any long signal paths or the test will fail intermittently.
DSP Error Codes
DSPO - DSP Not Executing Program DSP not responding
DSP1 - SSI Test Timeout Serial Port Timeout
DSP2 - SSI Loopback Timeout Data not completing loopback
DSP3 - SSI Bad Data Data mismatch after loopback
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