The Atari Resource

Cp Function

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0

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NACT

D

0

i

A DAR

0

1

0

1A0

0

1

1

DTB

i

0

0

BAR

i

0

1

DW

i

Û

Dws

1

1

1

INACTIVE. See 01D (TAB) belo* LATCH ADDRESS See 111 UNTAKl bduw INACTIVE The PSG/CPU bus Is inactiva DA7--DAD are n a high imprrJance aiaia. FIE AH FTtü*d PSG. Th s &ir] ii;bl tauses Ihe contend Ihe register which s CLirrfrfitly addressed ta appear on irw PSG/CPU bui. OA7—DAO 3re in the Ouipul made

LATCH ADDRESS. See 111 (INTAK'i belosv INACTIVE. See 01(3 (IAS) above WRITE 10 PSG Th s signal indicates that the huí contains register d.Híi wlrch should be Ifiichi.KJ iriio the currenliy fiddr^ssed *eg>ater. DA7--DAD are in the mput modi-

LATCH ADDRESS This sign:» indicates thai the bus contains ¡i roister address wnich should De lalched in P5-G. DAr-DAO are in irtpul mode

While interfacing to a processor other than the CP16QÜ would simply require simulating ihe above decoding, th? redundancies in the PSG functions vs. bus control signals can be used to advantage in thai only four of the eight possible decoded bus functions are required by the PSG This could simplify the prog ram ming of the bus control signals to Ihe lolloping, which would only require thai The processor generate two bus control signals fRDIR and BCl, with BC2 lied 10 +5V);

PSG FUNCTION

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